Verilog HDL by Samir Palnitkar

Verilog HDL by Samir Palnitkar
Publisher: Prentice Hall PTR (January 15, 1996) | ISBN: 0134516753 | Pages: 396 | PDF | 11.11 MB

Stresses the practical design perspective of Verilog rather than emphasizing only the language aspects. The information presented is fully compliant with the upcoming IEEE 1364 Verilog HDL standard. The book is intended primarily for beginners and intermediate-level Verilog users. However, for advanced Verilog users, the broad coverage of topics makes it an excellent reference book to be used in conjunction with the manuals and training materials of Verilog-based products. The book presents a logical progression of Verilog HDL-based topics. It starts with the basics, such as HDL-based design methodologies, and then gradually builds on the basics to eventually reach advanced topics, such as PLI or logic synthesis. Thus, the book is useful to Verilog users with varying levels of expertise as explained below.

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